Inside Intel’s Core Ultra Series 3 “Panther Lake-H” Mobile Processor Architecture

Intel’s latest Core Ultra Series 3 “Panther Lake-H” mobile processors represent a significant leap in chip design, leveraging advanced disaggregated architecture to deliver enhanced performance and efficiency for next-generation laptops. Recently, Kurnal Insights provided an in-depth annotation of the Panther Lake-H die-shot, offering a closer look at the processor’s innovative structure and technology.

Disaggregated Tile-Based Design

Like its predecessors “Arrow Lake-H” and “Meteor Lake,” Panther Lake-H utilizes a disaggregated, or chiplet-based, approach. However, Intel has refined its strategy, drawing inspiration from the “Lunar Lake” architecture. The processor is composed of four primary tiles:

  • SoC Tile: Built on the Intel 18A process, this tile integrates the CPU cores—including both the main compute complex and a low-power island—alongside the neural processing unit (NPU) and the main memory controllers.
  • Graphics Tile: Responsible for the integrated GPU (iGPU), the graphics tile houses the Xe cores. On mainstream Panther Lake-H models, it features 4 Xe cores built on the Intel 3 node. For ultraportable Panther Lake-U variants, the tile is manufactured on TSMC’s N3E node and includes 12 Xe cores, catering to devices without discrete GPUs.
  • I/O Tile: Fabricated on TSMC’s N6 node, the I/O tile manages platform connectivity, including PCIe, Thunderbolt, and wireless interfaces.
  • Base Tile (Interposer): Constructed on Intel’s 22nm process, this foundational layer enables high-density interconnects between the stacked tiles. To ensure a uniform, rectangular chip shape for optimal cooling, Intel uses structural silicon “filler tiles” around the main components.

Compute Tile: Powering Performance and Efficiency

The compute tile is the largest and most complex, measuring 14.32 mm x 8.04 mm (115 mm²). It contains a total of 16 CPU cores, organized as 6 performance cores (P-cores), 8 efficiency cores (E-cores), and 4 low-power efficiency cores (LPE-cores). The main compute complex features six “Cougar Cove” P-cores, each with 3 MB of dedicated L2 cache, and two “Darkmont” E-core clusters, each cluster sharing 4 MB of L2 cache among four cores. These cores are interconnected via a high-speed ringbus and share an 18 MB L3 cache.

The low-power island E-cores, grouped into a 4-core cluster with 4 MB of shared L2 cache, are physically located on the same tile but operate independently from the main compute complex, communicating through the tile’s internal switching fabric. Performance-wise, the P-cores can boost up to 5.10 GHz, E-cores up to 3.80 GHz, and the LPE-cores up to 3.70 GHz, with lower base frequencies for the low-power cluster to optimize energy efficiency.

In addition to CPU cores, the compute tile integrates the main memory controller, supported by an 8 MB memory-side cache. It supports dual-channel DDR5 and LPDDR5X memory at speeds up to 9600 MT/s. The tile also houses Intel’s latest NPU 5, featuring three neural compute engines (NCEs) with a combined 4.5 MB of scratchpad RAM, enabling advanced AI and machine learning workloads. The remaining area likely includes the media and display engines, essential for modern integrated graphics.

Graphics Tile: Advanced Xe3 “Celestial” Architecture

The graphics tile varies by processor model. In the mainstream Panther Lake-H, it contains 4 Xe cores built on Intel 3, while the Panther Lake-U variant boasts 12 Xe cores on TSMC N3E for enhanced graphics performance. The larger graphics tile measures 8.14 mm x 6.78 mm (55.18 mm²) and includes 16 MB of L2 cache. The integrated GPU is based on Intel’s Xe3 “Celestial” architecture, delivering robust graphics capabilities for gaming, content creation, and AI-accelerated tasks.

I/O Tile: Comprehensive Connectivity

The I/O tile, measuring 12.44 mm x 4 mm (49.76 mm²) and built on TSMC N6, is dedicated to platform connectivity. It features a PCIe root complex and a fully integrated Thunderbolt 5 (USB4 v2) host router. The tile provides four PCIe 5.0 lanes, eight PCIe 4.0 lanes, two Thunderbolt 5 ports, and integrated Wi-Fi 7 plus Bluetooth 5.4 support, ensuring high-speed data transfer and versatile connectivity for modern mobile devices.

Conclusion

Intel’s Core Ultra Series 3 “Panther Lake-H” processors showcase the company’s expertise in advanced chiplet design, combining cutting-edge process nodes and architectural innovations. With a focus on performance, efficiency, and connectivity, Panther Lake-H sets a new standard for mobile computing, catering to both mainstream notebooks and ultraportable devices.