Samsung Ships HBM4 Memory Samples, Prepares for Mass Production in 2026
Samsung has announced its third quarter 2025 financial results, revealing significant progress in its advanced memory technology portfolio. The company confirmed that it has begun shipping samples of its next-generation HBM4 (High Bandwidth Memory 4) to customers worldwide, with full-scale mass production scheduled for 2026. According to Samsung, “HBM3E is currently in mass production and being sold to all related customers, while HBM4 samples are simultaneously being shipped to key clients.” This highlights the strong demand for high-performance memory solutions and underscores Samsung’s leadership in the semiconductor industry.
HBM4 Memory: Advancing High-Performance Computing
HBM memory technology is essential for applications requiring high bandwidth and low latency, such as artificial intelligence (AI), machine learning, and data center workloads. In an HBM stack, multiple DRAM dies—up to 12—are vertically integrated using through-silicon vias (TSVs). This architecture allows for the inclusion of an optional base die, which can be customized with logic or accelerator circuitry to meet specific performance needs.
While most companies utilize standard HBM memory modules for cost efficiency and compatibility, major industry players like NVIDIA and AMD often require custom features to support their large-scale operations. These customizations may not necessarily involve adding compute power, but rather integrating data processing or logic dies that optimize data routing, reduce latency, and enhance overall throughput. Such improvements are particularly valuable during AI inference tasks, where minimizing latency can lead to significant gains in token processing speed.
Raising the Bar: Bandwidth Beyond JEDEC Specifications
The industry standard for HBM4, as defined by JEDEC, specifies a bandwidth of 2 TB/s and a pin transfer rate of 8 Gb/s across a 2048-bit interface. However, leading memory manufacturers are already pushing these boundaries. For example, Micron has announced plans to exceed the JEDEC specification, targeting an 11 Gb/s pin transfer rate and achieving up to 2.8 TB/s bandwidth—a 40% increase over the standard.
Given the competitive landscape and the demands from top clients like NVIDIA and AMD, Samsung is expected to innovate beyond the baseline JEDEC requirements for HBM4. This drive for higher bandwidth and lower latency will be crucial for supporting next-generation AI accelerators and high-performance computing platforms.
Looking Ahead: 2nm GAA and New Manufacturing Facilities
In addition to advancements in memory technology, Samsung’s Foundry Business is preparing to deliver new 2nm Gate-All-Around (GAA) products and HBM4 base-die solutions in 2026. The company also plans to commence operations at its new semiconductor fabrication facility in Taylor, Texas, ensuring a stable supply of cutting-edge chips to meet global demand.
Samsung’s ongoing investments in memory and foundry technologies reinforce its position as a leader in the semiconductor industry, driving innovation for AI, data centers, and high-performance computing worldwide.
